Exemplary embodiments of the present invention relate to a method of operating a nonvolatile memory device.
In recent years, there is an increasing demand for nonvolatile memory devices which can be electrically programmed and erased and which do not require the refresh function of rewriting data at specific intervals.
During a program operation on a nonvolatile memory cell, a verification operation is performed for checking whether a target program cell has been programmed with more than a verification voltage. If the program operation has been performed using a single level cell (SLC) program method, a single verification voltage is used because one page includes cells with only two different states. However, if the program operation has been performed using a multi-level cell (MLC) program method, a number of verification voltages are used because one page includes cells having several states. For example, when the program operation has been performed using a 2-bit MLC program method, if an MSB program operation is performed, verification operations are performed using three kinds of verification voltages. In this case, according to an incremental step pulse program (ISPP) method, after one pulse is supplied, three verification operations need to be performed.
If the program operation has been performed using the MLC program method as described above, memory cells have a number of distributions of the threshold voltages. Accordingly, it is desirable for technology to improve the distribution characteristics of the threshold voltages. Furthermore, in the ISPP method, after one pulse has been supplied, it is inefficient to perform a number of verification operations. Accordingly, it is desirable to reduce such inefficiency.